/*
 * Copyright (c) 2021 Futurewei Technologies, Inc.
 *
 * clang2mpl is licensed under Mulan PSL v2.
 * You can use this software according to the terms and conditions of the Mulan
 * PSL v2. You may obtain a copy of Mulan PSL v2 at:
 *
 *     http://license.coscl.org.cn/MulanPSL2
 *
 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY
 * KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
 * NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. See the
 * Mulan PSL v2 for more details.
 */
// RUN: %clang2mpl --ascii --verify %s -- -Wno-unused-value --target=aarch64-linux-elf
// RUN: cat %m | %FileCheck %s

int foo(int a) {
  // CHECK: LOC 2 [[# @LINE + 3 ]]{{$}}
  // CHECK-NEXT: if (eq i32 i32 (dread i32 %a, constval i32 0)) {
  // CHECK-NEXT: }
  if (a == 0)
    ;
  // CHECK: LOC 2 [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: if (lt i32 i32 (dread i32 %a, constval i32 0)) {
  // CHECK-NEXT:   return (constval i32 1)
  // CHECK-NEXT: }
  if (a < 0) return 1;
  // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: if (gt i32 i32 (dread i32 %a, constval i32 0)) {
  if (a > 0) {
    // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
    // CHECK-NEXT: return (constval i32 2)
    return 2;
    // CHECK: }
  }
  // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: if (ne i32 i32 (dread i32 %a, constval i32 0)) {
  if (a != 0) {
    // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
    // CHECK-NEXT: eval (add i32 (dread i32 %a, constval i32 2))
    a + 2;
    // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
    // CHECK-NEXT: return (dread i32 %a)
    return a;
    // CHECK: }
  }
  // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: if (eq i32 i32 (dread i32 %a, constval i32 4)) {
  if (a == 4) {
    // CHECK: LOC 2 [[# @LINE + 2 ]]{{$}}
    // CHECK-NEXT: return (constval i32 4)
    return 4;
  // CHECK: }
  // CHECK-NEXT: else {
  // CHECK-NEXT: LOC 2 [[# @LINE + 3 ]]{{$}}
  // CHECK-NEXT:   return (constval i32 5)
  // CHECK-NEXT: }
  } else return 5;
  // CHECK: LOC 2 [[# @LINE + 6 ]]{{$}}
  // CHECK-NEXT: dassign %post.[[#POST1:]] 0 (dread i32 %a)
  // CHECK-NEXT: dassign %a 0 (add i32 (dread i32 %a, constval i32 1))
  // CHECK-NEXT:  if (ne i32 i32 (dread i32 %post.[[#POST1]], constval i32 0)) {
  // CHECK-NEXT:   return (dread i32 %a)
  // CHECK-NEXT: }
  if (a++) return a;
  // CHECK: LOC 2 [[# @LINE + 5 ]]{{$}}
  // CHECK-NEXT: dassign %a 0 (add i32 (dread i32 %a, constval i32 1))
  // CHECK-NEXT: if (ne i32 i32 (dread i32 %a, constval i32 0)) {
  // CHECK-NEXT:   return (dread i32 %a)
  // CHECK-NEXT: }
  if (++a) return a;
}
